[HW] SoC Design (Video Codec & Display Subsystem Integration)
부문
R&D
직군
Engineering
직무
HW Engineer
경력사항
경력 5년 이상
고용형태
정규직
근무지
㈜딥엑스대한민국 경기도 성남시 판교역로241번길 20 미래에셋벤처타워 5층, ㈜딥엑스

Frontier of ​On-device ​AI ​Semiconductors

for Everyone, ​Everywhere


About DEEPX Co., Ltd.


DEEPX ​is ​a forward-thinking ​Series D startup ​architecting the ​infrastructure ​for the ​Physical ​AI ​era.

By delivering ​the ​world’s most energy-efficient ​NPU ​technology, ​we are solving ​the critical ​power ​and heat ​challenges of ​Generative ​AI to bring ​super-intelligence to ​every device, everywhere.

 

Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO

opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

 

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link

 

★ If you want to be part of world-class innovation? Please talk with us.

★Explore our journey: The DEEPX White Paper ☞ Link


Responsibilities

Video Subsystem Integration: Integrate and configure 3rd-party Video Codec IPs to handle high-resolution video streams efficiently within the AI semiconductor architecture.

Display & Video Out Integration: Integrate Display Out Formatters, Video Out systems (e.g., HDMI Out, MIPI Out), and frame buffer compression IPs (specifically AFBC or AFRC) to deliver high-quality outputs while minimizing memory bandwidth and power consumption.

Video Data Flow Architecture: Design and implement the subsystem RTL to seamlessly connect video codecs, memory interfaces, and display pipelines, optimizing overall system throughput from rendering to final output.

Cross-functional Collaboration: Collaborate with hardware, software, and external IP vendor teams to resolve system-level bottlenecks and support the commercialization of edge AI devices.


Qualifications

IP Integration & Verification Skills: Proficiency in RTL implementation (Verilog/SystemVerilog) for subsystem integration, and strong experience in IP-level and subsystem-level verification.

Video Out System Experience: Proven hands-on experience in integrating, configuring, or verifying Video Out Subsystems, particularly with display interfaces such as HDMI Out or MIPI Out.

Memory Bandwidth Optimization: Experience integrating frame buffer compression technologies (AFBC, AFRC, etc.) using 3rd-party IPs to optimize SoC memory bandwidth.

Video & Display Expertise: Deep understanding of video codec standards and display pipeline architectures for effective IP evaluation, configuration, and debugging.

Problem-Solving: Ability to debug complex video data flow issues, memory interface bottlenecks, and subsystem integration challenges.


Preferred Qualifications

Experience in applying NPU technologies to video processing tasks.

Previous experience in the system semiconductor or AI hardware industry.

Innovation & IP: Experience in filing patents or developing core IP portfolios.

Excellent communication skills to work with global IP vendors and partners.


Recruitment Process

Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion

※ The recruitment process may vary depending on the position and application content.

※ Candidates with less than 3 years of experience are required to submit their academic transcripts.


Employment Type

Full-time (3-month probationary period with 100% compensation)


Working Hours

Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)


Notes

If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.

A 3-month probationary period applies after joining, with no reduction in salary or benefits.


Benefits

□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여

□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)

□ 점심식사 + 아침 & 저녁식사 지원

□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공

□ 사우나가 포함된 피트니스 비용 지원

□ 연 1회 종합건강검진 지원 (배우자 포함)

□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공

□ 설/추석 명절 상여금 지급

□ 축하와 위로를 위한 경조휴가 및 경조금 지원

공유하기
[HW] SoC Design (Video Codec & Display Subsystem Integration)

Frontier of ​On-device ​AI ​Semiconductors

for Everyone, ​Everywhere


About DEEPX Co., Ltd.


DEEPX ​is ​a forward-thinking ​Series D startup ​architecting the ​infrastructure ​for the ​Physical ​AI ​era.

By delivering ​the ​world’s most energy-efficient ​NPU ​technology, ​we are solving ​the critical ​power ​and heat ​challenges of ​Generative ​AI to bring ​super-intelligence to ​every device, everywhere.

 

Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO

opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

 

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link

 

★ If you want to be part of world-class innovation? Please talk with us.

★Explore our journey: The DEEPX White Paper ☞ Link


Responsibilities

Video Subsystem Integration: Integrate and configure 3rd-party Video Codec IPs to handle high-resolution video streams efficiently within the AI semiconductor architecture.

Display & Video Out Integration: Integrate Display Out Formatters, Video Out systems (e.g., HDMI Out, MIPI Out), and frame buffer compression IPs (specifically AFBC or AFRC) to deliver high-quality outputs while minimizing memory bandwidth and power consumption.

Video Data Flow Architecture: Design and implement the subsystem RTL to seamlessly connect video codecs, memory interfaces, and display pipelines, optimizing overall system throughput from rendering to final output.

Cross-functional Collaboration: Collaborate with hardware, software, and external IP vendor teams to resolve system-level bottlenecks and support the commercialization of edge AI devices.


Qualifications

IP Integration & Verification Skills: Proficiency in RTL implementation (Verilog/SystemVerilog) for subsystem integration, and strong experience in IP-level and subsystem-level verification.

Video Out System Experience: Proven hands-on experience in integrating, configuring, or verifying Video Out Subsystems, particularly with display interfaces such as HDMI Out or MIPI Out.

Memory Bandwidth Optimization: Experience integrating frame buffer compression technologies (AFBC, AFRC, etc.) using 3rd-party IPs to optimize SoC memory bandwidth.

Video & Display Expertise: Deep understanding of video codec standards and display pipeline architectures for effective IP evaluation, configuration, and debugging.

Problem-Solving: Ability to debug complex video data flow issues, memory interface bottlenecks, and subsystem integration challenges.


Preferred Qualifications

Experience in applying NPU technologies to video processing tasks.

Previous experience in the system semiconductor or AI hardware industry.

Innovation & IP: Experience in filing patents or developing core IP portfolios.

Excellent communication skills to work with global IP vendors and partners.


Recruitment Process

Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion

※ The recruitment process may vary depending on the position and application content.

※ Candidates with less than 3 years of experience are required to submit their academic transcripts.


Employment Type

Full-time (3-month probationary period with 100% compensation)


Working Hours

Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)


Notes

If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.

A 3-month probationary period applies after joining, with no reduction in salary or benefits.


Benefits

□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여

□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)

□ 점심식사 + 아침 & 저녁식사 지원

□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공

□ 사우나가 포함된 피트니스 비용 지원

□ 연 1회 종합건강검진 지원 (배우자 포함)

□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공

□ 설/추석 명절 상여금 지급

□ 축하와 위로를 위한 경조휴가 및 경조금 지원