Frontier of On-device AI Semiconductors
for Everyone, Everywhere
About DeepX Co., Ltd.
DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.
By delivering the world’s most energy-efficient NPU technology, we are solving the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere.
Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO
opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.
We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link
★ If you want to be part of world-class innovation? Please talk with us.
★Explore our journey: The DEEPX White Paper ☞ Link
Responsibilities
□ Yield ramp-up: Drive NPI yield ramp-up, addressing systematic/parametric yield, eliminate systematic defects and ensure robust product yield margin with corner lot evaluation
□ Mass production Monitoring and Operations: Oversee trends, shifts and excursions of
foundry WAT/PCM and production PT/FT yields using statistical methods
□ MPW/Product Tape-out Execution: Revolve DRC violations in collaboration with Design/Foundry teams and plan Silicon execution to deliver customer samples on-time including Pavement lots, Corner splits and back up lot etc.
□ Power-performance Optimization: Collaborate with foundry process teams to execute corner lot and DOEs to maximize product power-performance margins for mass production
□ FA and Corrective Actions: Lead cross-functional teams to investigate the root cause of product failures and implement corrective/preventative actions
□ Foundry management: Manage business and engineering issues including mask revision,
excursion recovery, PCN etc.
□ Yield Prediction & Modeling: Forecast short/long term product yield by using FAB D0 and device targeting by statistical models
Qualifications
□ Experience: 15+ years of professional experience in Yield Enhancement or Process Integration (PI) or Product Engineering within advanced logic process technologies
□ Technical Knowledge: In-depth understanding of FinFET fabrication flows, device physics
and device/product reliability
□ Data Analytical Skills: Proficiency in yield data analysis tools (e.g., JMP, other YMS
tools etc.) and scripting (Python etc.)
□ Technical Leadership: Drive diverse teams to define issues, analyze root-cause and implement
solid solutions
□ Education: Bachelor’s degree or higher in Electrical Engineering, Materials Science, Physics, or a related field.
Preferred Qualifications
□ 5+ years of direct experience in sub-5nm in FinFET and beyond CMOS logic process nodes
□ Proven track record of leading projects with global foundries (e.g., TSMC, Samsung Foundry etc.)
□ Experiences in NPI and high-volume mass production of high-performance SoCs such as NPUs or
GPUs.
□ SPICE simulation for device level performance evaluation
□ Strong communication skills in English for global collaboration.
Recruitment Process
□ Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion
※ The recruitment process may vary depending on the position and application content.
※ Candidates with less than 3 years of experience are required to submit their academic transcripts.
Employment Type
□ Full-time (3-month probationary period with 100% compensation)
Working Hours
□ Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)
Notes
□ If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.
□ A 3-month probationary period applies after joining, with no reduction in salary or benefits.
Benefits
□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여
□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)
□ 점심식사 + 아침 & 저녁식사 지원
□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공
□ 사우나가 포함된 피트니스 비용 지원
□ 연 1회 종합건강검진 지원 (배우자 포함)
□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공
□ 설/추석 명절 상여금 지급
□ 축하와 위로를 위한 경조휴가 및 경조금 지원
Frontier of On-device AI Semiconductors
for Everyone, Everywhere
About DeepX Co., Ltd.
DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era.
By delivering the world’s most energy-efficient NPU technology, we are solving the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere.
Our global leadership is validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO
opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.
We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link
★ If you want to be part of world-class innovation? Please talk with us.
★Explore our journey: The DEEPX White Paper ☞ Link
Responsibilities
□ Yield ramp-up: Drive NPI yield ramp-up, addressing systematic/parametric yield, eliminate systematic defects and ensure robust product yield margin with corner lot evaluation
□ Mass production Monitoring and Operations: Oversee trends, shifts and excursions of
foundry WAT/PCM and production PT/FT yields using statistical methods
□ MPW/Product Tape-out Execution: Revolve DRC violations in collaboration with Design/Foundry teams and plan Silicon execution to deliver customer samples on-time including Pavement lots, Corner splits and back up lot etc.
□ Power-performance Optimization: Collaborate with foundry process teams to execute corner lot and DOEs to maximize product power-performance margins for mass production
□ FA and Corrective Actions: Lead cross-functional teams to investigate the root cause of product failures and implement corrective/preventative actions
□ Foundry management: Manage business and engineering issues including mask revision,
excursion recovery, PCN etc.
□ Yield Prediction & Modeling: Forecast short/long term product yield by using FAB D0 and device targeting by statistical models
Qualifications
□ Experience: 15+ years of professional experience in Yield Enhancement or Process Integration (PI) or Product Engineering within advanced logic process technologies
□ Technical Knowledge: In-depth understanding of FinFET fabrication flows, device physics
and device/product reliability
□ Data Analytical Skills: Proficiency in yield data analysis tools (e.g., JMP, other YMS
tools etc.) and scripting (Python etc.)
□ Technical Leadership: Drive diverse teams to define issues, analyze root-cause and implement
solid solutions
□ Education: Bachelor’s degree or higher in Electrical Engineering, Materials Science, Physics, or a related field.
Preferred Qualifications
□ 5+ years of direct experience in sub-5nm in FinFET and beyond CMOS logic process nodes
□ Proven track record of leading projects with global foundries (e.g., TSMC, Samsung Foundry etc.)
□ Experiences in NPI and high-volume mass production of high-performance SoCs such as NPUs or
GPUs.
□ SPICE simulation for device level performance evaluation
□ Strong communication skills in English for global collaboration.
Recruitment Process
□ Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion
※ The recruitment process may vary depending on the position and application content.
※ Candidates with less than 3 years of experience are required to submit their academic transcripts.
Employment Type
□ Full-time (3-month probationary period with 100% compensation)
Working Hours
□ Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)
Notes
□ If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.
□ A 3-month probationary period applies after joining, with no reduction in salary or benefits.
Benefits
□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여
□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)
□ 점심식사 + 아침 & 저녁식사 지원
□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공
□ 사우나가 포함된 피트니스 비용 지원
□ 연 1회 종합건강검진 지원 (배우자 포함)
□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공
□ 설/추석 명절 상여금 지급
□ 축하와 위로를 위한 경조휴가 및 경조금 지원