Frontier of ​On-device ​AI ​Semiconductors

for Everyone, ​Everywhere

You may apply for ​any ​position in ​the Software & ​Hardware Engineering ​departments.

[Software ​Engineer]

System SW

□ ​Develop ​ROM ​boot code and ​bootloaders

□ ​Implement Core, BSP ​(Board ​Support ​Package), and protocol ​stacks

□ Develop ​driver ​software for ​USB, PCIe, ​DDR, ​SD/eMMC, MIPI, ISP, ​Codec, etc.

□ ​Implement initial test software for various hardware IPs

□ Develop system module control software (e.g., Power Management, MMU)

□ Develop and debug SoC-level verification software

Runtime SW

□ Design and implement a real-time inference engine optimized for DEEPX NPU architecture

□ Develop pre/post-processing frameworks optimized for system/CPU design

□ Design, implement, and optimize the NPU/CPU interface

□ Develop AI application software based on NPU

□ Design and implement system-level NPU verification and automated testing software

□ Collaborate with all internal SW/HW teams

Generative AI

□ Analyze state-of-the-art (SOTA) generative AI models and technology trends

□ Develop and refine DNN model compression techniques including quantization

□ Optimize generative AI models for DEEPX edge devices (NPU products)

□ Develop and enhance new generative AI technologies optimized for DEEPX hardware

DNN Model Optimization

□ Analyze DNN model operations and develop related optimization and compression techniques

□ Research and apply GPU optimization methods and track the latest literature

□ Study and develop optimization techniques for cutting-edge DNN models

□ Analyze and track developments in various DNN compilers

□ Perform algorithm optimization for DEEPX software code

Compiler (DL) Engineer

□ Develop deep learning compilers optimized for DEEPX AI products

□ Implement various compiler optimizations: tiling, memory optimization, operation fusion, etc.

□ Collaborate with NPU HW team to define HW/SW specifications and interfaces for efficient AI computation

[Hardware Engineer]

RTL Design (Hardware IP)

□ Design RTL-based hardware IPs related to AI processor architecture and development

NPU Architect

□ Explore, share, discuss, and finalize NPU architectures that meet specification requirements

□ Collaborate to develop profiling tools tailored to internal and customer needs

□ Predict hardware-efficient performance quickly and accurately for AI networks (C++, SystemC)

□ Work with deep learning, RTL, and compiler teams to design optimized NPU architectures and engineering methods

□ Propose advanced NPU structures considering new network characteristics and system components

FPGA

□ Build FPGA platforms and develop prototypes related to AI processor architecture and development

SoC ASIC Design

□ Design SoC ASICs focused on AI processor architecture and development

Recruitment Process

□ Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion

※ The recruitment process may vary depending on the position and application content.

※ Candidates with less than 3 years of experience are required to submit their academic transcripts.

Employment Type

□ Full-time (3-month probationary period with 100% compensation)

Working Hours

□ Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)

Notes

□ If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.

□ A 3-month probationary period applies after joining, with no reduction in salary or benefits.

Benefits

□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여

□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)

□ 점심식사 + 아침 & 저녁식사 지원

□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공

□ 사우나가 포함된 피트니스 비용 지원

□ 연 1회 종합건강검진 지원 (배우자 포함)

□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공

□ 설/추석 명절 상여금 지급

□ 축하와 위로를 위한 경조휴가 및 경조금 지원